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Slot Patch Antenna Design

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  1. Slot Antenna Design
  2. Patch Antenna Design Formula
Design
Application Project: Designing A Slot-Coupled Patch Antenna Array With A Corporate Feed Network Using EM.Picasso

Objective: In this project, we will build and analyze a 16-element slot-coupled patch antenna array with a microstrip corporate feed network.

Concepts/Features:

  • PEC Traces
  • Slot Traces
  • Mesh Density
  • Scattering Wave Port
  • Strip Gap Circuit
  • Radiation Pattern

Minimum Version Required: All versions

' Download Link: None

Introduction

The designed antenna consists of a radiating metallic patch situated on one side of a thin, non-conducting, substrate panel with a metallic ground plane situated on the other side of the panel. The metallic patch is made of thin copper foil or is copper-foil-plated with a. 5-26.3 Improved Design Methods, 282 References, 283 6 Microstrip Antennas 285 6-1 Microstrip Antenna Patterns, 287 6-2 Microstrip Patch Bandwidth and Surface-Wave Ef ciency, 293 6-3 Rectangular Microstrip Patch Antenna, 299 6-4 Quarter-Wave Patch Antenna, 310 6-5 Circular Microstrip Patch, 313 6-6 Circularly Polarized Patch Antennas, 316.

EM.Picasso can be used to analyze large and fairly complex multilayer planar structures. In this application note, we will show how to use EM.Picasso to design a 4 × 4 slot-coupled patch antenna array with a microstrip corporate feed network. The design process involves three steps: design of the slot-couple patch element, design of the power divider, and finally, construction of the 16-element array. The first two steps are the subject of two of EM.Picasso's tutorial lessons.

Designing the Patch Radiating Element

The operating frequency of the patch array is f = 2.4GHz. At this frequency, the free-space wavelength is λ0 = 125mm. The patch radiators will be spaced at half free-space wavelength: Sx = Sy = λ0/2 = 62.5mm. The design of the slot-coupled patch antenna is described in detail in EM.Picasso Tutorial Lesson 7: Designing A Slot-Coupled Patch Antenna. The substrate consists of two finite-thickness dielectric layers with εr = 3.38, σ = 0, separated by a perfect electric conductor (PEC) ground plane of infinite lateral extents. The table below summarizes the substrate stackup's layer hierarchy:

Substrate Object Label Substrate Object Type Function Material Thickness
THS Half-Space Medium Top Substrate Termination Vacuum Infinite
PEC_1 PEC Trace Patch Plane PEC 0
Layer_1 Substrate Layer Patch Substrate ROGER RO4003C 2mm
PMC_1 Slot Trace Slot Plane PMC 0
Layer_2 Substrate Layer Feed Substrate ROGER RO4003C 0.787mm
PEC_2 PEC Trace Microstrip Feed Plane PEC 0
BHS Half-Space Medium Bottom Substrate Termination Vacuum Infinite

The design variables in this problem include the side dimensions of the square patch radiator, length and width of the coupling slot and the length of the open microstrip stub extended beyond the coupling slot. The width of the mircostrip feed line is chosen to be wf = 2.4mm to yield a characteristic impedance of Z0 = 50Ω.

Design Variable Name Optimal value
patch_len 39.5mm
slot_len 12mm
slot_wid 1.5mm
stub_len 21mm

Designing the Wilkinson Power Divider

The input signal power must be divided equally among 16 patch radiating elements. In other words, a 1:16 power distribution network is needed for this project. The design of a Wilkinson power divider is described in detail in EM.Picasso Tutorial Lesson 9: Designing a Microstrip Wilkinson Power Divider. An Ω-shaped microstrip ring is used to create a three-port network. The input and output microstrip lines all have a width of 2.4mm with Z0 = 50Ω. The microstrip partial ring has a width of √2Z0 = 70.7Ω and serves as the two quarter-wave arms of the Wilkinson power divider. It is determined that if a lumped 100Ω resistor is connected between the two output arms of this divider, better return loss and isolation levels are achieved. The figure below shows the geometry of the optimized 1:2 Wilkinson power divider.

The geometry of the Wilkinson power divider with the lumped resistor.

Constructing a Four-Element Patch Sub-Array

A binary H-tree structure is used to construct a 1:4 Wilkinson power divider network as shown in the figures below. In this case, the network involves three ring-type Wilkinson power dividers.

The geometry of the four-element slot-coupled patch sub-array with a corporate feed network.
The geometry of the four-element slot-coupled patch sub-array with the patches in the freeze state.

The multilayer structure is parameterized with the design variables listed in the table below. Of these variables, only the open stub length needs to be changed to 18.5mm, and rest of them retain their original value for the best input impedance match.

Design Variable Name Optimal value
patch_len 39.5mm
slot_len 12mm
slot_wid 1.5mm
stub_len 18.5mm
resistance 100 Ohms

The figure below shows the planar mesh of the sub-array. The patch and slot elements are discretized with a mesh density of 30 cells per effective wavelength, while the corporate feed network requires a higher mesh density of 50 cells per effective wavelength due to the narrow line hosting the lumped resistors.

The hybrid planar mesh of the four-element slot-coupled patch sub-array with a corporate feed network.

The 4-element slot-coupled patch sub-array is simulated using EM.Picasso's planar method of moments (MoM) solver. An adaptive frequency sweep is performed to compute the frequency response of the structure over the frequency range [2.2GHz - 2.6GHz]. The figures below show the variation of the sub-array's return loss with frequency and its 3D far-field radiation pattern computed at 2.4GHz.

The return loss of the 4-element patch sub-array over the frequency range [2.2GHz - 2.6GHz].
3D radiation pattern of the 4-element patch sub-array computed at 2.4GHz.

Constructing a 16-Element Patch Array

The binary H-tree structure described earlier is expanded to construct a 1:16 Wilkinson power divider network as shown in the figures below. In this case, the network involves 15 ring-type Wilkinson power dividers.

The geometry of the 16-element slot-coupled patch array with a corporate feed network.
The geometry of the 16-element slot-coupled patch array with the patches in the freeze state.
Slot Patch Antenna Design

Using the same mesh densities as before, the planar mesh shown in the figure below is generated for the 16-element patch array.

The hybrid planar mesh of the 16-element slot-coupled patch array with a corporate feed network.

The matrix size for this planar MoM simulation is N = 10,771. EM.Picasso's LU solver was used to solver the linear system. The total computation time including the LU decomposition, back-substitution and computation of the full 3D far-field radiation pattern at an angular resolution of 1° along both the azimuth and elevation directions was 150 seconds. At the end of the planar MoM simulation, the following port characteristics are reported:

S11: 0.447781 + 0.118984j

S11(dB): -6.682387

Slot Antenna Design

Z11: 123.053609 + 37.286922j

Y11: 0.007443 - 0.002255j

The figures below show the 3D far-field radiation pattern as well as 2D Cartesian radiation pattern cuts in the principal YZ and ZX planes computed at 2.4GHz. A directivity of D0 = 17.3dB is predicted for this array.

3D far-field radiation pattern of the 16-element patch array computed at 2.4GHz.

Patch Antenna Design Formula

The 2D Cartesian radiation pattern of the 16-element patch array in the YZ principal plane.
The 2D Cartesian radiation pattern of the 16-element patch array in the ZX principal plane.

The figures below show the surface electric current distribution maps on the patch and feed planes, as well as the surface magnetic current distribution map on the middle ground plane, all computed at 2.4GHz.

The surface electric current distribution map on the feed network plane at 2.4GHz.
The surface electric current distribution map on the patch radiators at 2.4GHz.
The surface magnetic current distribution map on the coupling slots at 2.4GHz.


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Design Ideas for Printed and Microstrip Antennas

Note:

Many of the antennas presented below relate to areas in which a wide variety of patents have been granted.

It should not be assumed that because a technique or physical structure is described here it is free of patents or other commercial Intellectual Property.

They are presented here only for information and educational purposes.

-Ground Plane Effect on Printed Antennas

-Planar Antennas Selection Chart

-Basic Microstrip Antenna Shapes

Slot Patch Antenna Design

-Basic Printed Slot Antennas with Feed Structures

-Comparison of Microstrip Patch and Slot Antennas